Signal translating devices utilizing sequentially operated storage diodes



March 28, 1967 w. J. BARTIK 3 11,

' SIGNAL TRANSLATING DEVICES UTILIZING SEQUENTIALLY OPERATED STORAGEDIODES Filed July 18, 1963 2 Sheets-Sheet z OUTPUTS 2 3 1b FIG. 3 I

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United States Patent SIGNAL TRANSLATING DEVICES UTILIZ- ING SEQUENTIALLYOPERATED STOR- AGE DIODES William J. Bartik, Jenkintown, Pa., assignorto Sperry Rand Corporation, New York, N.Y., a corporation of DelawareFiled July 18, 1963, Ser. No. 296,018 3 Claims. (Cl. 307-885) Thisinvention relates to a signal translating device and more particularlyto a device for generating signals at precisely timed intervals whereinsaid signal translating device employs the storage characteristics ofstorage diodes.

Signal generating devices known to the prior art which permit thegeneration of series of output signals at precisely timed intervals arecomplex to construct and difficult to maintain. These devices employcomplex systems of oscillators and frequency stabilizing and controllingdevices to insure the time of occurrence of the various Output signals.The changing of the frequency or time of occurrence of the output pulsesof such devices requires complex and bothersome recalibration andadjustment. It is, therefore, an object of this invention to provide asignal generating device which is capable of producing a series ofoutput signals at precisely timed intervals and which is easilyadjustable over a wide range of repetition rates.

It is an object of this invention to provide a signal generating deviceemploying storage diode devices.

It is a further object of this invention to provide a signal generatingdevice constructed of storage diode devices which can be simply adjustedwith regard to the repetition rate of said signals.

It is a further object of this invention to provide an improved form ofsignal generating device which is simple to construct and whoserepetition rate can be easily controlled.

It is yet another object of this invention to provide a signalgenerating device whose active elements are solid state elements.

Other objects and features of the invention will be pointed out in thefollowing description and claims and illustrated in the accompanyingdrawings, which disclose by way of example, the principle of theinvention, and the best mode for carrying it out.

In the drawings:

FIGURE 1 is a graphical representation of the characteristics of atypical storage diode;

FIGURE 2 is a schematic drawing of one embodiment of the invention;

FIGURE 3 is a timing diagram showing the outputs available from theembodiment of FIGURE 2;

FIGURES 4a and 4b are timing diagrams of the driver source employed withthe embodiment of FIGURE 2.

Referring now to FIGURE 1, there is shown a typical characteristic of asemi-conductive storage diode of the type described in the January 1962issue of the Proceedings of the I.R.E., at pages 43 to 53 by Moll et'al. This characteristic is shown as a function of current versus time.The heavy continuous line is representative of the idealizedcharacteristic. The dashed line is representative of a more typicalcharacteristic actually obtainable. It is to be understood, of course,that certain noise and ringing effects may also occur, but areeliminated from the drawing for simplicity. In particular, the line isrepresentative of the current which is passed by the diode when thediode is biased in a forward direction, i.e. with the positive potentialapplied to the anode of the diode relative to its cathode. Line 10 alsorepresents the low impedance 3,311,750 Patented Mar. 28, 1967 state ofthe diode. When the potential applied to the anode of the diode isswitched to a negative potential relative to its cathode, the current tothe diode immediately switches in the ideal case from a forward current,to the reverse current I designated by the line portion 12. This reversecurrent is provided by the withdrawal of charge stored within thesemiconductor material of the diode. That is, the reverse current iscreated by the withdrawal of carriers injected into the material of thediode during the period the diode was forward biased and had currentflowing through it in the forward direction. This reverse current willbe proportional to the charge stored during the forward bias conditiondiminished by the amount of recombination which takes place within thediode material. At the termination of reverse current flow, that is whenall charge carriers have been withdrawn or recombined, the diode will beplaced in a high impedance state. The time during which this reversecurrent flows is designated 1 If the loss of charge due to recombinationis small, the charge acquired by the diode during application of forwardbiasing will be ideally equal to the charge which the diode will give upduring the reverse bias operation.

The vertical line portion 14 suggests that the switching of the diodecan be done instantaneously. This suggestion is, of course, only for theidealized case. Practically, the transition characteristic between theforward and reverse currents is more closely akin to the line portion 20(shown dashed). Whenever a storage diode has been rendered conducting ina forward direction, a certain reverse current is exhibited by the diodewhen the potentials of the electrodes thereof are instantaneouslyreversed. In a properly designed storage diode, the bulk of the carrierswill be withdrawn during the time t The remaining carriers will beremoved during a decay phase, as shown by dashed line 16, after time iThe length of this decay phase and the number of carriers afiected willbe negligible, as will the resulting current.

Referring now to FIGURE 2, a signal generating device constructed inaccordance with the concepts of the invention and employing storagediode devices is illustrated. A number of storage diode devices, D1, D2,D3 through Dn are connected via resistors, R1, R2, R3 through Rn,respectively to a source of positive voltage +E The application of thepositive potential +E across the resistors R1, R2, R3 through Rn causethe forward biasing currents I I I through i to flow which go via therespective resistors to the anodes of the diodes D1, D2, D3 through Dn.The cathodes of the diodes D1, D2, D3 through Dn are connected through acommon line 200 to ground. The anodes of the respective diodes areconnected to one another by means of additional resistors. Thus, theanode of diode D1 is connected to the anode of diode D2 via a resistorR12, and in a similar manner the anode of diode D2 is connected to theanode of diode D3 via the resistor R23. Finally, the anode of the diodeD12 is connected to the anode of the diode Dn1 (not shown) by means of aresistor R(n1)n. Output leads 1, 2, 3 through n are taken from theanodes of the respective diodes D1, D2, D3 through Dn. The anode of thediode D1 is further connected via line 206 to a constant current source202 composed of a source of negative potential E, and a resistor RS. Theconstant current source 202 will provide a negative current sink whichwill permit the withdrawal of the charge in storage diodes in the mannerdescribed above.

The operation of the device of FIGURE 2 may be explained as follows. Theapplication of the positive potential +E to the various resistors R1,R2, R3 through Ru and thence to the anodes of the storage diodes D1, D2,D3 through Dn causes these diodes to be forward biased to their lowimpedance states and to produce an output current as indicated in FIGURE1 by the line 10. After sufiicient time has elapsed to permit chargestorage, a negative potential E is applied to reverse bias the diode D1.The charge stored in diode D1 will flow to the current source 202 andthe return current will fiow from ground along the connecting line 200to the diode D1. This current flow results from the withdrawal ofcarriers from the material as described above and when it has terminatedthe device in its high impedance state. The current resulting from thewithdrawal of the stored charge will have the value of current 1 minusthe current I The circuit will require a finite amount of time towithdraw the stored charge as shown by the line 12 of FIGURE 1 until thepoint 18 is reached at which time withdrawal of all stored charge isconsidered to terminate. When the withdrawal of charge has beencompleted, a difierentiated output voltage can be detected at the outputterminal 1. This output voltage at .terminal 1 is due because when thewithdrawal current ceases, it does so abruptly and the negative shift involtage which accompanies the cessation of the withdrawal current isreadily detected by a differentiator. This negative voltage shift thencauses diode D2 to discharge and when its withdrawal current ceasesthere is a negative voltage shift experienced at the second outputterminal and the first output terminal. The voltages available at therespective terminals 1 through N are negative as shown in FIGURE 3. Eachcharge removal will take place in the manner described with reference todiode D1 and will not be described in detail. The operation of chargewithdrawal will continue until all the diodes through diode Dn have beencompleted. As each diode is discharged, a signal will be produced fromthe output path which is connected to the anodes of the diodes. Once theoperation of the device has been completed and the constant currentsource 202 is turned off, the source of positive potential +E will causethe diodes D1 through D): to be forward biased once more to permit arepetition of the operation just described. The amount of time whichmust be allowed between consecutive cycles of the device will dependupon the characteristics of the particular storage diode deviceemployed. The diode must have time enough to store a sufilcient chargeand operate along the portion of the FIGURE 1 illustrated by the line10.

FIGURE 4a illustrates the application of a constant DC. voltage supply+E to the device. It should be understood that a certain finite timewill be required to permit the storage of sufiicient charge in thediodes. In order to decrease the amount of time required for the deviceto be made available for the generation of a further set of signals, acombination source consisting of a pulse source and a constant DC.voltage source +E may be employed. As illustrated in the FIGURE 4b, thesource of pulses is applied during the first portion of the time period.The amplitude and length of duration of the pulse applied will besufficient to cause the proper storage of carriers in the diodes deviceduring a desired short interval of time. The storage in the diodes iscontrolled by the total charge which is determined by the magnitude ofthe voltage pulse and its duration. The

pulse period is followed by the application of a steady D.C. positivepotential +E extending for the complete operation cycle of the signalgenerating device. With a combined source of this type, it is possibleto achieve a faster recycling of the system. The control of theapplication of the pulses for injecting charge into the diodes as wellas controlling the time of application and turn off of the constantcurrent source 202 may be had by means of the main clock source of thecomputer (not shown). That is, a first clock pulse may turn on the pulsesource to charge the diodes, a second clock pulse turn on the source 202and a third clock pulse turn source 202 off. The only requirement as tothe repetition rate of the clock pulses is that it be low enough topermit the desired operations to be completed during the time betweensuccessive clock pulses. Alternatively, the output of the diode Dn maybe (1) applied to turn off the constant current source 202, (2) appliedto a pulse source (not shown) to generate the pulse +E and (3) appliedto a delay unit (not shown) the output of which will effectively turn onthe source 202 once the storage of charge has been completed. Any othersuitable means may be employed to control the required sources. The D.C.signal +E will be maintained on during the entire operation of thedevice.

The current which flows from the stored charge of the first storagediode D1 was described above to be equal to the current I minus the DC.forward biasing current I However, the current available from the seconddiode is decreased from that available from the first diode. Thewithdrawal current from the diode D2 is found to be equal to the currentI minus (I +I Each succeeding diode will have a value of current whichis decreased in a similar manner. That is to say, the withdrawal currentfrom diode Dn will be equal to I minus the sum of the I of all diodes Ithrough 11. Thus it can be seen that the amplitude of the withdrawalcurrent from the final diode in a series, that is the diode D'n, may bequite small. As was stated above, ideally the charge accumulated duringthe forward biasing period is equal to the amount of charge which may bereclaimed from the charge stored diode. Thus if the amount of storage isdecreased during the period of the application of the forward biasing, asmaller Withdrawal current will result in the same constant time, tr.Thus the resistors R1, R2, R3 to Rn may be arranged to have anincreasing value of impedance to insure that the amount of chargedeveloped by the diodes D1, D2, D3 to Dn decreases as a function of theposition of the diode. In this manner, the withdrawal of the chargesfrom each of the storage diodes will be in an equivalent time, tr, whichconstant from diode to diode is assured. The resistors R12, R23 throughR(n1)n also have certain design criteria imposed upon them. They rnustbe large enough to minimize current to any given stage from those ofhigher or lower orders due to differences in the diode forward voltagedrops.

As has been described above, the device is controllable as to therepetition rate or time of occurrence of the respective outputs of thedevice. Considering the equations presented below which define theoperation of the storage diode, the manner in which control can beachieved is readily understandable. The equation for charge storageduring the injection time is:

where Qf fCI'WElI'CI charge I =forward current t =forward injection time'r=carrier lifetime (i.e. time a carrier can remain without recombiningand thus not be available for with- The equation for the chargewithdrawn during the reverse cycle of operation is:

where Q the stored charge during the forward bias operation as expressedby Equation 1 t =time of application or I l reverse current Q =totalcharge during the reverse period.

When Q goes to zero, the charge withdrawal has been completed. t reverserecovery time I r(1-e2 /T) =Q ef /r (9) if z T r n=Qs if Z 'r l2) .I'r:Q e1 /'r (13) For intermediate cases between I 1 and i T E'IR/T(Q +I-T):I -T (14) f in 2;

If operation of the device is limited to conditions Where t r and Z rthen the charge withdrawn is equal to the forward charge injected and Q=Q (2-1) Thus if the time of application of the forward current iscontrolled and the amount of reverse current I is limited by theexternal circuitry of the storage diode, the reverse recovery time willbe made a direct function of the forward bias current I The time betweenswitching of the respective diodes from their low impedance state totheir high impedance states may be accurately controlled by the value ofthe positive potential source +E and the values of the resistors R1 toRn. The most desirable mode of operation is that in which 7', I and Iare such that Z t =I t Equation 7 represents another acceptable methodof charge storage which is dependent upon the forward bias current andthe value of 1- for the diode material employed. Equation 7 may be setequal to Equation 4 and give I t OI I Y which is dependent upon thephysical properties of the material. This dependence provides alimitation of this approach in that 1- and consequently t may vary fromdiode to diode.

Referring now to FIGURE 3, the relative timing of the outputs availablefrom the terminals 1 through it are shown. Line 1a shows the outputavailable from the terminal 1 as a result of the completion of thecharge withdrawal from diode D1. After the diode D1 is switched and asthe charge withdrawal from diode D2 begins, the first negative stepvoltage is generated as shown in line 1a. As each successive diode inthe line is switched to its high impedance state, the amplitude of thevoltage available at the terminal 1 is decreased by one step for eachsuch switching as shown by lines 1b, 1c and in. The reason for this isas follows. When each of the diodes has been charged (prior to applyingE) the difference of potential across each diode is equal as measuredfrom group :1. The potential difierence as measured across resistor RSbefore D is discharged is equal to the potential difierence as measuredacross R12 and RS in series before D is discharged, but after D isdischarged. Accordingly, after D is discharged the voltage value atterminal 1 is less than before D is discharged by the value of thevoltage across R12. When the second diode D2 has its charge withdrawn,the current for switching diode D3 is applied to the resistor R and theresistor I T I t R Thus a voltage will be available at the terminal 1which is equal to the current multiplied by the resistance R12 plus thecurrent multiplied by the resistance R23. As each successive diode isswitched, the voltage again will be diminished by the current times theresistor value associated with the diode.

If the outputs]. through it are connected to threshold type amplifiers,(not shown) which are not level sensitive, the output at the terminal 1will appear as shown in the line 1a by the dashed line. That is,providing a certain minimal value of signal is available, an output willbe produced. However, increases in the amplitude of the signal availableat the terminal 1 will not increase the output of the amplifier. Thus,the amplifier, at the position of the switching of the first diode, willprovide a constant level signal for the entire duration of therecombination of the diodes D1 through Dn. On the other hand, if theterminals 1 through it are connected to the difierentiating devices (notshown) an output as shown in line d will be produced. For each change inlevel of the output as shown in line b, a short duration pulse will beproduced as indicated by the line 1d. The outputs for the diode D2 asshown by lines 2a, 2b and 212 are similar to that described withreference to the diode D1, but will commence when the second diode isswitched and continue until the n diode is switched. Similarly lines 3aand 3n describe the outputs of diode D3 while line Na describes theoutput of diode Dn.

While there have been shown and described and pointed out thefundamental novel features of the invention as applied to the preferredembodiment, it will be understood that various omissions andsubstitutions and changes of the form and details of the device asillustrated and its operation may be made by those skilled in the artwithout departing from the spirit of the invention.

The embodiments of the invention in which an exclusive property orprivilege is claimed are defined as follows:

1. A signal translating device for producing a series of output signalscomprising: a plurality of storage diode means each having an anode anda cathode, said diodes capable of being switched between high and lowimpedance states; a bias source connected to all of the anodes of saiddiode means to place said diodes in a low impedance state; a potentialsource connected to all of the cathodes of said diode means; resistormeans connected between the anodes of successive diode means; an inputsource connected through said resistor means to the anode of each ofsaid diode means to sequentially switch said diodes from said lowimpedance state to said high impedance state; and a plurality of outputmeans each connected to the anode of a different one of said diode meansto provide an output signal when its associated diode means is switchedto its high impedance state.

2. A device as claimed in claim 1, wherein said bias source is a voltagesource connected to the anodes of said diode means through parallelbranches each containing a second resistor means.

3. A device as claimed in claim 1, wherein said bias source is a voltagesource connected to said anodes of said diode means through parallelbranches each containing a graduated resistor means, the impedance ofsaid resistor means decreasing for each consecutive diode means.

References Qited by the Examiner UNITED STATES PATENTS 3,121,810 2/1964Horna 307-885 3,200,267 8/1965 Cubert 307-885 3,235,748 2/ 1966 Mahoneyet al 307--88.5

ARTHUR GAUSS, Primary Examiner. R. H. EPSTEIN, Assistant Examiner.

1. A SIGNAL TRANSLATING DEVICE FOR PRODUCING A SERIES OF OUTPUT SIGNALSCOMPRISING: A PLURALITY OF STORAGE DIODE MEANS EACH HAVING AN ANODE ANDA CATHODE, SAID DIODES CAPABLE OF BEING SWITCHED BETWEEN HIGH AND LOWIMPEDANCE STATES; A BIAS SOURCE CONNECTED TO ALL OF THE ANODES OF SAIDDIODE MEANS TO PLACE SAID DIODES IN A LOW IMPEDANCE STATE; A POTENTIALSOURCE CONNECTED TO ALL OF THE CATHODES OF SAID DIODE MEANS; RESISTORMEANS CONNECTED BETWEEN THE ANODES OF SUCCESSIVE DIODE MEANS; AN INPUTSOURCE CONNECTED THROUGH SAID RESISTOR MEANS TO THE ANODE OF EACH OFSAID DIODE MEANS TO SEQUENTIALLY SWITCH SAID DIODES FROM SAID LOWIMPEDANCE STATE TO SAID HIGH IMPEDANCE STATE; AND A PLURALITY OF OUTPUTMEANS EACH CONNECTED TO THE ANODE OF A DIFFERENT ONE OF SAID DIODE MEANSTO PROVICE AN OUTPUT SIGNAL WHEN ITS ASSOCIATED DIODE MEANS IS SWITCHEDTO ITS HIGH IMPEDANCE STATE.